TOKYO — In a major boost for silicon-on-insulator technology, Toshiba Corp. will adopt Canon Inc.'s Eltran SOI wafer process for broadband microprocessors built in 0.1-micron and 0.07-micron process ...

Semiconductor logic and memory technology development continues to push the limits of process complexity and cost, especially as the industry migrates to the 5 nm node and beyond. Optimization of the ...

A technical paper titled “Review of virtual wafer process modeling and metrology for advanced technology development” was published by researchers at Coventor Inc., Lam Research. “Semiconductor logic ...

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Power consumption is a crucial consideration for all types of electronics. As critical power components used in a wide range of electronic products, power MOSFET and other types of power semiconductor ...

BEDFORD, Mass. & SEOUL, South Korea--(BUSINESS WIRE)--Silicon wafer manufacturer 1366 Technologies together with its strategic partners, Hanwha Q CELLS Malaysia Sdn. Bhd. and parent company Hanwha Q ...

US-Based wafer producer 1366 Technologies and ‘Silicon Module Super League’ (SMSL) member Hanwha Q CELLS have jointly hit a new record of 19.6% efficiency for cells using 1366's 'Direct wafer' process ...

A silicon wafer is a thin slice of crystalline silicon typically grown using the Czochralski process, which involves pulling a crystal seed from a molten silicon bath. A silicon wafer is a thin slice ...

In an update to its International Technology Roadmap for Photovoltaics, German engineering association the VDMA notes standardization of wafer size is a topic of great interest to the country’s PV ...

Concept of mask/wafer co-optimization by moving the shot with mask and wafer double simulation to minimize wafer error. VSB shot configurations and its corresponding ...

LONDON — Surface Technology Systems plc, a developer of plasma etch systems, has announced that it intends to build a Deep Reactive Ion Etch (DRIE) system suitable for 300-mm diameter wafers. The ...